pga370 ETC-unknow, pga370 Datasheet - Page 15

• Manufacturer Part Number: pga370
• Description: Mpu Pentium Iii 64-bit 0.18um 700mhz 370-pin Fcpga
• Manufacturer: ETC-unknow

2.2.1
2.2.2
Datasheet
Figure 4. Stop Clock State Machine
For the processor to fully realize the low current consumption of the Stop-Grant, Sleep and Deep
Sleep states, a Model Specific Register (MSR) bit must be set. For the MSR at 02AH (Hex), bit 26
must be set to a ‘1’ (this is the power on default setting) for the processor to stop all internal clocks
during these modes. For more information, see the Intel Architecture Software Developer’s
Manual, Volume 3: System Programming Guide located on the developer.intel.com website.
Normal State—State 1
This is the normal operating state for the processor.
AutoHALT Powerdown State—State 2
AutoHALT is a low power state entered when the processor executes the HALT instruction. The
processor transitions to the Normal state upon the occurrence of SMI#, INIT#, or LINT[1:0] (NMI,
INTR). RESET# causes the processor to immediately initialize itself.
The return from a System Management Interrupt (SMI) handler can be to either Normal Mode or
the AutoHALT Power Down state. See the Intel Architecture Software Developer's Manual,
Volume III: System Programmer's Guide for more information.
FLUSH# is serviced during the AutoHALT state, and the processor will return to the AutoHALT
state.
2. Au to HAL T P o w er D ow n S tate
4. HAL T/G rant S no op S tate
B CLK running.
S noops and interrupts allowed.
B CLK running.
S ervice snoops to caches.
S noop
E vent
O ccurs
Pentium
S noop
E vent
S erviced
®
III Processor for the PGA370 Socket at 500 MHz to 1.13 GHz
S TP CLK # D e-asserted
IN IT#, B IN IT #, IN T R ,
S M I#, R E S E T #
HA LT Instruction and
HA LT B us C ycle G enerated
S noop E vent S erviced
S noop E vent O ccurs
and Stop-Grant State
S T P CLK # A sserted
,
NMI
entered from
AutoHALT
1. No rm al S tate
3. S top G ran t S tate
5. S leep S tate
6. Deep S leep S tate
N orm al execution.
B CLK running.
S noops and interrupts allowed.
B CLK running.
N o snoops or interrupts allow ed.
B CLK stopped.
N o snoops or interrupts allow ed.
S T P CLK #
A sserted
S LP #
A sserted
B C LK
Input
S topped
S T P CLK #
De-asserted
S LP #
De-asserted
B C LK
Input
Restarted
PC B757a
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