aduc7062 Analog Devices, Inc., aduc7062 Datasheet - Page 19

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aduc7062

Manufacturer Part Number
aduc7062
Description
Low-power, Precision Analog Microcontroller, Dual ?-? Adcs, Flash/ee, Arm7tdmi
Manufacturer
Analog Devices, Inc.
Datasheet
Preliminary Technical Data
FEEDAT Register
FEEDAT is a 16-bit data register. This register holds the data
value for flash read and write commands.
Name:
Address:
Default value:
Access:
FEEADR Register
FEEADR is a 16-bit address register used for accessing
individual pages of the 32 kB flash block. The valid address
range for a user is: 0x0000 – 0x77FF. this represents the 30 kB
flash user memory space. A read or write access outside this
boundary causes a data abort exception to occur.
Name
Address
Default value
Access
FEESIGN Register
The FEESIGN register is a 24-bit MMR. This register is updated
with the 24-bit signature value after the signature command has
been executed. This value is the result of the linear feedback
shift register (LFSR )operation initiated by the signature
command.
Name:
Address:
Default value:
Access:
FEEPRO Register
FEEPRO MMR provides protection following a subsequent
reset of the MMR. It requires a software key (see Table 10).
Name:
Address:
Default value:
Access:
FEEDAT
0xFFFF080C
0xXXXX
Read/write
FEEADR
0xFFFF0810
0x0000
Read/write
FEESIGN
0xFFFF0818
0xFFFFFF
Read
FEEPRO
0xFFFF081C
0x00000000
Read/write
Rev. PrA | Page 19 of 100
FEEHIDE Register
FEEHIDE MMR provides immediate protection. It does not
require any software key. Note that the protection settings in
FEEHIDE are cleared by a reset (see Table 10).
Name:
Address:
Default value:
Access:
Table 10. FEEPRO and FEEHIDE MMR Bit Designations
Bit
31
30
29
28:0
Command Sequence for Executing a Mass Erase
FEEDAT = 0x3CFF;
FEEADR = 0x77C3;
FEEMOD = FEEMOD|0x8;
FEECON = 0x06;
Description
Read Protection.
Cleared by user to protect all code. – no JTAG read
accesses for protected pages if this bit is set.
Set by user to allow reading the code via JTAG.
Protection for Page 59 (0x00087600 – 0x000877FF. Set
by user to allow writing the Page 59. Cleared to
protect Page 59.
Protection for Page 58 (0x00087400 – 0x000875FF. Set
by user to allow writing the Page 58. Cleared to
protect Page 58.
Write Protection for Page 57 to Page 0. Each bit
represents 2 pages. Each page is 512 bytes in size.
Bit0 is protection for Page 0 and Page 1 (0x00080000 –
0x000803FF. Set by the user to allow writing Page 0
and Page 1. Cleared to protect Page 0 and Page 1.
Bit1 is protection for Page 2 and Page 3 (0x00080400 –
0x000807FF. Set by the user to allow writing Page 2
and Page 3. Cleared to protect Page 2 and Page 3.
..
..
Bit27 is protection for Page 54 and Page 55
(0x00087000 – 0x000873FF. Set by the user to allow
writing Page 54 and Page 55. Cleared to protect
Page 54 and Page 55.
Bit28 is protection for Page 56 and Page 57
(0x00087400 – 0x000877FF. Set by the user to allow
writing Page 56 and Page 57. Cleared to protect
Page 56 and Page 57.
ADuC7060/ADuC7061/ADuC7062
FEEHIDE
0xFFFF0820
0xFFFFFFFF
Read/write
//Erase key enable
//Mass erase command

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