aduc7062 Analog Devices, Inc., aduc7062 Datasheet - Page 38

• Manufacturer Part Number: aduc7062
• Description: Low-power, Precision Analog Microcontroller, Dual ?-? Adcs, Flash/ee, Arm7tdmi
• Manufacturer: Analog Devices, Inc.

ADuC7060/ADuC7061/ADuC7062
Bit
6 to 4
3, 2
1 to 0
ADC Filter Register
Name:
Address:
Default Value:
Access:
Function:
Note:
Table 36. ADCFLT MMR Bit Designations
Bit
15
14
13 to 8
Name
ADC1REF[2:0]
BUF_BYPASS[1:0]
Name
CHOPEN
RAVG2
AF[5:0]
ADCFLT
0xFFFF0514
0x0007
Read/write
The ADC filter MMR is a 16-bit register that controls the speed and resolution of both the on-chip ADCs.
If ADCFLT is modified, the primary and auxiliary ADCs are reset.
Description
Chop Enable. Set by the user to enable system chopping of all active ADCs. When this bit is set, the ADC has very low
offset errors and drift, but the ADC output rate is reduced by a factor of three if AF = 0 (see Sinc3 decimation factor,
Bits[6:0] in this table). If AF > 0, then the ADC output update rate is the same with chop on or off. When chop is
enabled, the settling time is two output periods.
Running Average-by-2 Enable Bit.
Set by the user to enable a running-average-by-two function reducing ADC noise. This function is automatically
enabled when chopping is active. It is an optional feature when chopping is inactive, and if enabled (when chopping
is inactive) does not reduce the ADC output rate but does increase the settling time by one conversion period.
Cleared by the user to disable the running average function.
Averaging Factor (AF). The values written to these bits are used to implement a programmable first-order Sinc3 post
filter. The averaging factor can further reduce ADC noise at the expense of output rate as described in Bits[6:0] Sinc3
decimation factor in this table.
Description
[1100] = VREF+, VREF−. Note: This is the reference selected by the ADC1REF bits.
[1101] = DAC_OUT/AGND.
[1110] = Undefined.
[1111] = Internal short to ADC3. TBC
Auxiliary Channel ADC Reference Select.
[0 00] = Internal Reference selected. In ADC low power mode, the voltage reference selection is controlled
by ADCMODE[5].
[0 01] = External reference inputs (VREF+, VREF−) selected. Set the HIGHEXTREF1 bit if reference voltage
exceeds 1.3 V.
[010] = Auxiliary external reference inputs (ADC4/EXT_REF2IN+, ADC5/EXT_REF2IN−) selected. Set the
HIGHEXTREF1 bit if reference voltage exceeds 1.35 V.
[011] = (AVDD, AGND) divided-by-two selected. If this configuration is selected, the HIGHEXTREF1 bit is set
automatically.
[100] = (AVDD, ADC3). ADC3 can be used as the negative input terminal for the reference source.
[101] to [111] = Reserved.
[0 0] = Full Buffer on. Both positive and negative buffer inputs active.
[0 1] = Negative Buffer is bypassed, positive buffer is on.
[1 0] = Negative Buffer is on, positive buffer is bypassed.
[11] = Full Buffer Bypass. Both positive and negative buffer inputs are off.
Digital Gain. Select for Auxiliary ADC Inputs.
[00] = ADC1 gain = 1
[01] = ADC1 gain = 2
[10] = ADC1 gain = 4
[11] = ADC1 gain = 8
Rev. PrA | Page 38 of 100
Preliminary Technical Data