z8fmc16100 ZiLOG Semiconductor, z8fmc16100 Datasheet - Page 145

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z8fmc16100

Manufacturer Part Number
z8fmc16100
Description
Z8 Encore Motor Control Flash Mcus
Manufacturer
ZiLOG Semiconductor
Datasheet

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Table 71. LIN-UART Control 0 Register (U0CTL0)
PS024611-0408
BITS
FIELD
RESET
R/W
ADDR
LIN-UART Control 0 Register
TEN
R/W
7
0
The LIN-UART Control 0 register
UART’s transmit and receive operations. A more detailed discussion of each bit follows
the table.
TEN—Transmit Enable
This bit enables or disables the transmitter. The enable is also controlled by the CTS signal
and the CTSE bit. If the CTS signal is Low and the CTSE bit is 1, the transmitter is enabled.
0 = Transmitter disabled.
1 = Transmitter enabled.
REN—Receive Enable
This bit enables or disables the receiver.
0 = Receiver disabled.
1 = Receiver enabled.
CTSE—CTS Enable
0 = The CTS signal has no effect on the transmitter.
1 = The LIN-UART recognizes the CTS signal as an enable control for the transmitter.
PEN—Parity Enable
This bit enables or disables parity. Even or odd is determined by the PSEL bit.
0 = Parity is disabled. This bit is overridden by the
1 = The transmitter sends data with an additional parity bit and the receiver receives an
additional parity bit.
PSEL—Parity Select
0 = Even parity is transmitted and expected on all received data.
1 = Odd parity is transmitted and expected on all received data.
SBRK—Send Break
This bit pauses or breaks data transmission. Sending a break interrupts any transmission in
progress, so ensure that the transmitter has finished sending data before setting this bit. In
standard UART mode, the duration of the break is determined by how long software
leaves this bit asserted. Also the duration of any required Stop bits following the break
REN
R/W
6
0
CTSE
R/W
5
0
PEN
R/W
4
0
(Table
F42H
71) configures the basic properties of the LIN-
PSEL
R/W
3
0
MPEN
Z8FMC16100 Series Flash MCU
SBRK
bit.
R/W
2
0
LIN-UART Control 0 Register
Product Specification
STOP
R/W
1
0
LBEN
R/W
0
0
133

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