z8fmc16100 ZiLOG Semiconductor, z8fmc16100 Datasheet - Page 286
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z8fmc16100
Manufacturer Part Number
z8fmc16100
Description
Z8 Encore Motor Control Flash Mcus
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z8FMC16100.pdf
(381 pages)
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PS024611-0408
Assembly Language Syntax
For proper instruction execution, eZ8 CPU assembly language syntax requires that the
operands be written as ‘destination, source’. After assembly, the object code usually has
the operands in the order ’source, destination’, but ordering is Opcode-dependent. The
following instruction examples illustrate the format of some basic assembly instructions
and the resulting object code produced by the assembler. This binary format must be
followed for manual program coding or for those who intend to implement their own
assembler.
Example 1—
43h
Example 2—
address can specify any register location in the range 0–255 or, using Escaped Mode
Addressing in working registers R0–R15. If the contents of Register
Register R8 are added and the result is stored in
object code is:
LD 234H, #%01
Assembly Language Code
Object Code
Assembly Language Code
Object Code
, the assembly syntax and resulting object code is:
If the contents of registers
In general, when an instruction format requires an 8-bit register address, that
; Working Register R7, is the source. The contents
of R7 is
; written into R4.
; Another Load (LD) instruction with two operands.
; The first operand, Extended Mode Register Address
234H,
; identifies the destination. The second operand,
Immediate Data
; value 01h, is the source. The value 01h is
written into the
; Register at address 234h.
ADD
ADD
04
04
43H,
43H,
43h
E8
08
and
08h
R8
43
43
08h
43h
, the assembly syntax and resulting
are added and the result is stored in
(ADD dst, src)
(OPC src, dst)
(ADD dst, src)
(OPC src, dst)
Product Specification
eZ8 CPU Instruction Set
43h
and Working
274
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