z8fmc16100 ZiLOG Semiconductor, z8fmc16100 Datasheet - Page 68

• Manufacturer Part Number: z8fmc16100
• Description: Z8 Encore Motor Control Flash Mcus
• Manufacturer: ZiLOG Semiconductor

Table 33. IRQ0 Enable High Bit Register (IRQ0ENH)
BITS
FIELD
RESET
R/W
ADDR
PS024611-0408
Bit Position
[0]
PA40I
IRQ0 Enable High and Low Bit Registers
PWMENH
R/W
7
0
The IRQ0 Enable High and Low Bit registers, shown in
priority encoded enabling for interrupts in the Interrupt Request 0 register. Priority is
generated by setting bits in each register.
Table 32. IRQ0 Enable and Priority Encoding
PWMENH—PWM Interrupt Request Enable High Bit
FLTENH—Fault Interrupt Request Enable High Bit
ADCENH—ADC Interrupt Request Enable High Bit
CMPENH—Comparator Interrupt Request Enable High Bit
T0ENH—Timer 1 Interrupt Request Enable High Bit
U0RENH—UART 0 Receive Interrupt Request Enable High Bit
U0TENH—UART 0 Transmit Interrupt Request Enable High Bit
SPIENH—SPI Interrupt Request Enable High Bit
IRQ0ENH[x] IRQ0ENL[x] Priority
0
0
1
1
Note: x indicates the register bits from 0 through 7.
Value (H)
0
1
FLTENH
R/W
6
0
Description
PA4 or PA0 Interrupt Request—Logic in the Port A GPIO module selects
either PA4 or PA0 and either rising or falling edge.
No interrupt request is pending for PA4 or PA0
An interrupt request from PA4 or PA0 is awaiting service.
ADCENH CMPENH
0
1
0
1
R/W
5
0
Disabled
Level 1
Level 2
Level 3
R/W
4
0
FC1H
Table 32
T0ENH
R/W
Description
Disabled
Low
Nominal
High
3
0
describes the priority control for IRQ0.
Z8FMC16100 Series Flash MCU
IRQ0 Enable High and Low Bit Registers
U0RENH
Table 33
R/W
2
0
Product Specification
and
U0TENH
Table
R/W
1
0
34, form a
SPIENH
R/W
0
0
56