z8fmc16100 ZiLOG Semiconductor, z8fmc16100 Datasheet - Page 322
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z8fmc16100
Manufacturer Part Number
z8fmc16100
Description
Z8 Encore Motor Control Flash Mcus
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z8FMC16100.pdf
(381 pages)
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PWM Control 1 Register (PWMCTL1)
BITS
FIELD
RESET
R/W
ADDR
PS024611-0408
Bit
Position
[7:6]
RLFREQ[1:0]
[5]
INDEN
[4]
Pol2
[3]
Pol1
[2]
Pol0
[1:0]
PRES
RLFREQ[1:0]
7
Hex Address: F21
Value (H) Description
R/W
00
01
10
11
00
01
10
11
00
0
1
1
0
1
0
1
0
6
Reload Event Frequency
This bit field is buffered. Changes to the reload event frequency takes effect
at the end of the current PWM period. Reads always return the bit values
from the temporary holding register.
PWM reload event occurs at the end of every PWM period.
PWM reload event occurs once every 2 PWM periods.
PWM reload event occurs once every 4 PWM periods.
PWM reload event occurs once every 8 PWM periods.
Independent PWM Mode Enable
This bit may only be altered when PWEN (PWMCTL0) cleared.
PWM outputs operate as 3 complementary pairs.
PWM outputs operate as 6 independent channels.
Invert Output polarity for channel pair PWM2.
Non-inverted polarity for channel pair PWM2.
Invert Output polarity for channel pair PWM1.
Non-inverted polarity for channel pair PWM1.
Invert Output polarity for channel pair PWM0.
Non-inverted polarity for channel pair PWM0.
PWM Prescaler
The prescaler divides down the PWM input clock (either the system clock or
the PWMIN external input). This field is buffered. Changes to this field take
effect at the next PWM reload event. Reads always return the values from the
temporary holding register.
Divide by 1
Divide by 2
Divide by 4
Divide by 8
INDEN
R/W
5
0
Pol45
R/W
4
0
F21H
Pol23
R/W
3
0
Z8FMC16100 Series Flash MCU
Pol10
R/W
2
0
Appendix A—Register Tables
Product Specification
1
PRES[1:0]
R/W
00
0
310
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