z8fmc16100 ZiLOG Semiconductor, z8fmc16100 Datasheet - Page 164

• Manufacturer Part Number: z8fmc16100
• Description: Z8 Encore Motor Control Flash Mcus
• Manufacturer: ZiLOG Semiconductor

PS024611-0408
Multimaster Operation
Transfer Format Phase Equals One
Figure 26
forms are depicted for SCK, one for CLKPOL reset to 0, and another for CLKPOL set to 1.
In a multimaster SPI system, all SCK pins are tied together, all MOSI pins are tied together,
and all MISO pins are tied together. All SPI pins must then be configured in OPEN-DRAIN
mode to prevent bus contention. At any time, only one SPI device is configured as the mas-
ter and all other SPI devices on the bus are configured as slaves. The master enables a sin-
gle slave by asserting the SS pin on that slave only. Then, the single master drives data out
its SCK and MOSI pins to the SCK and MOSI pins on the slaves (including those which are
not enabled). The enabled slave drives data out its MISO pin to the MISO master pin.
For a master device operating in a multimaster system, if the SS pin is configured as an
input and is driven Low by another master, the COL bit is set to 1 in the SPI Status register.
The COL bit indicates the occurrence of a multimaster collision (mode fault error
condition).
Input Sample Time
(CLKPOL = 0)
(CLKPOL = 1)
displays the timing diagram for an SPI transfer in which
MOSI
MISO
SCK
SCK
SS
Figure 26. SPI Timing When Phase is 1
Bit 7
Bit 7
Bit 6
Bit 6
Bit 5
Bit 5
Bit 4
Bit 4
Z8FMC16100 Series Flash MCU
Bit 3
Bit 3
Product Specification
Bit 2
Bit 2
PHASE
Multimaster Operation
Bit 1
Bit 1
is 1. Two wave-
Bit 0
Bit 0
152