z8fmc16100 ZiLOG Semiconductor, z8fmc16100 Datasheet - Page 216
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z8fmc16100
Manufacturer Part Number
z8fmc16100
Description
Z8 Encore Motor Control Flash Mcus
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z8FMC16100.pdf
(381 pages)
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Table 108. Sample and Settling Time (ADCSST)
BITS
FIELD
RESET
R/W
ADDR
PS024611-0408
Bit Position
[7:5]
[4:0]
SST
Sample Settling Time Register
Sample Time Register
7
The Sample Settling Time register
the SAMPLE/HOLD signal to the START signal, when the conversion can begin. The
number of clock cycles required for settling varies from system to system depending on the
system clock period used. You must program this register to contain the number of clocks
required to meet a 0.5 µs minimum settling time.
The Sample Time register
sample after a conversion has begun by setting the START bit in the ADC Control register
or initiated by the PWM. The number of system clock cycles required for sample time varies
from system to system, depending on the clock period used. You must program this register
to contain the number of system clocks required to meet a 1 µs minimum sample time.
Value (H)
0H–FH
0H
Reserved
R
6
0
Description
Reserved—Must be 0.
Sample settling time in number of system clock periods to meet 0.5
minimum.
5
(Table
109) is used to program the length of active time for the
(Table
4
1
F74H
108) is used to program the length of time from
3
1
Z8FMC16100 Series Flash MCU
SST
R/W
2
1
Sample Settling Time Register
Product Specification
1
1
µ
s
0
1
204
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