mc56f8335 Freescale Semiconductor, Inc, mc56f8335 Datasheet - Page 109

• Manufacturer Part Number: mc56f8335
• Description: 16-bit Digital Signal Controller
• Manufacturer: Freescale Semiconductor, Inc

6.5.8
The GPIO Peripheral Select Register can be used to multiplex out any one of the three alternate peripherals
for GPIOC. The default peripheral is Quad Decoder 1 and Quad Timer B (NOT available in the 56F8135
device); these peripherals work together.
The four I/O pins associated with GPIOC can function as GPIO, Quad Decoder 1/Quad Timer B, or as
SPI 1 signals. GPIO is not the default and is enabled/disabled via the GPIOC_PER, as shown in
Figure 6-10
choice between decoder/timer and SPI inputs/outputs is made in the SIM_GPS and in conjunction with the
Quad Timer Status and Control Registers (SCR). The default state is for the peripheral function of
GPIOC[3:0] to be programmed as decoder functions. This can be changed by altering the appropriate
controls in the indicated registers.
Freescale Semiconductor
Preliminary
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GPIO Input
GPIO Output
Pin Function
01110 = Reserved for factory test—SYS_CLK_DIV2
01111 = Reserved for factory test—SYS_CLK_D
10000 = ADCA clock
10001 = ADCB clock
GPIO Peripheral Select Register (SIM_GPS)
and
Figure 6-10 Overall Control of Pads Using SIM_GPS Control
Table
Table 6-2 Control of Pads Using SIM_GPS Control
Quad Timer Controlled
0
0
6-2. When GPIOC[3:0] are programmed to operate as peripheral I/O, then the
SPI Controlled
0
1
Control Registers
SIM_ GPS Register
56F8335 Technical Data, Rev. 5
GPIO Controlled
—
—
0
1
GPIOC_PER Register
—
—
0
1
I/O Pad Control
Comments
1
Register Descriptions
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