mc56f8335 Freescale Semiconductor, Inc, mc56f8335 Datasheet - Page 111

• Manufacturer Part Number: mc56f8335
• Description: 16-bit Digital Signal Controller
• Manufacturer: Freescale Semiconductor, Inc

6.5.8.5
This bit selects the alternate function for GPIOC0.
6.5.9
The Peripheral Clock Enable register is used to enable or disable clocks to the peripherals as a power
savings feature. The clocks can be individually controlled for each peripheral on the chip.
6.5.9.1
Each bit controls clocks to the indicated peripheral.
6.5.9.2
Each bit controls clocks to the indicated peripheral.
6.5.9.3
Each bit controls clocks to the indicated peripheral.
6.5.9.4
Each bit controls clocks to the indicated peripheral.
6.5.9.5
Each bit controls clocks to the indicated peripheral.
Freescale Semiconductor
Preliminary
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Base + $C
RESET
Read
Write
0 = PHASEB1/TB1 (default)
1 = MOSI1
0 = PHASEA1/TB0 (default)
1 = SCLK1
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
Peripheral Clock Enable Register (SIM_PCE)
GPIOC0 (C0)—Bit 0
External Memory Interface Enable (EMI)—Bit 15
Analog-to-Digital Converter B Enable (ADCB)—Bit 14
Analog-to-Digital Converter A Enable (ADCA)—Bit 13
FlexCAN Enable (CAN)—Bit 12
Decoder 1 Enable (DEC1)—Bit 11
EMI
15
1
Figure 6-12 Peripheral Clock Enable Register (SIM_PCE)
ADCB ADCA CAN DEC1 DEC0
14
1
13
1
12
1
11
1
56F8335 Technical Data, Rev. 5
10
1
TMRD
9
1
TMRC
8
1
TMRB TMRA
7
1
6
1
SCI1
5
1
SCI0
4
1
SPI1
3
1
SPI0
2
1
Register Descriptions
PWMB PWMA
1
1
0
1
111