zl50416 Zarlink Semiconductor, zl50416 Datasheet - Page 54

• Manufacturer Part Number: zl50416
• Description: Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
• Manufacturer: Zarlink Semiconductor

13.2.6
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13.2.7
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13.2.8
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Indirectly Accessed Registers
13.3
13.3.1
I
Accessed by CPU, serial interface and I
2
C Address 000 - 018; CPU Address:0000+2xN (N = port number)
Interrupt sources (8 bits)
Address = 5 (read only)
When CPU reads this register
Address = 6 (read/write)
When CPU writes to this register, data is written to the Control Command Frame Receive Buffer
When CPU reads this register, data is read from the Control Command Frame Transmit Buffer1
Address = 7 (read only)
When CPU reads this register, data is read from the Control Command Frame Transmit Buffer1
(Group 0 Address) MAC Ports Group
Interrupt Register
Control Command Frame Buffer1 Access Register
Control Command Frame Buffer2 Access Register
ECR1Pn: Port N Control Register
Bit [4]:
Bit [5]:
Bit [6]:
Bit [7]:
Bit [0]:
Bit [1]:
Bit [2]:
Bit [3]:
Bit [7:4]:
Note: This register is not self-cleared. After reading CPU has to clear the bit writing 0 to it.
7
Sp State
6
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5
A-FC
Receive FIFO has space for incoming CPU frame (RXFIFO_SPOK)
Transmit FIFO End Of Frame (TXFIFO_EOF)
Reserve
Reserve
CPU frame interrupt
Control Frame 1 interrupt. Control Frame receive buffer1 has data for CPU
to read
Control Frame 2 interrupt. Control Frame receive buffer2 has data for CPU
to read
Reserved
Reserved
4
Port Mode
2
C (R/W)
3
Zarlink Semiconductor Inc.
2
ZL50416
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Data Sheet