zl50416 Zarlink Semiconductor, zl50416 Datasheet - Page 90

• Manufacturer Part Number: zl50416
• Description: Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
• Manufacturer: Zarlink Semiconductor

13.9.34
CPU Address: 5a0, 5a1, 5a2
Accessed by CPU and serial interface (R/W)
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•
•
Represents values A-C for a CPU port. The values A-C are per-queue byte thresholds for random early drop.
QOSC3 represents A, and QOSC1 represents C. Granularity: 256 bytes
13.10
13.10.1
I
Accessed by CPU, serial interface and I
13.10.2
I
Accessed by CPU, serial interface and I
2
2
C Address F0, CPU Address:h600
C Address F1, CPU Address:h601
C - CPUQOSC1 – CPU BYTE_C1 I
B - CPUQOSC2 – CPU BYTE_C2 I
A - CPUQOSC3 – CPU BYTE_C3 I
(Group 6 Address) MISC Group
Bits [7]:
Bits[6]:
Bits[5]:
Bit[4:0]:
Bits[3:0]:
Bits [7:4]:
CPUQOSC123
MII_OP0 – MII Register Option 0
MII_OP1 – MII Register Option 1
7
hfc
7
Speed bit location
6
1prst
Half duplex flow control feature
0 = Half duplex flow control always enable
1 = Half duplex flow control by negotiation
Link partner reset auto-negotiate disable
Disable jabber detection. This is for HomePNA applications or any serial
operation slower than 10Mbps.
0 = Enable
1 = Disable
Vendor specified link status register address (null value means don’t use it)
(Default 00). This is used if the Linkup bit position in the PHY is non-standard
Duplex bit location in vendor specified register
Speed bit location in vendor specified register
(Default 00)
5
DisJ
4
4
Vendor Spc. Reg Addr
2
2
2
2
2
C (R/W)
C (R/W)
C Address h0C2, CPU Address 518)
C Address h0C3, CPU Address 519)
3
Duplex bit location
C Address h0C1, CPU Address 517)
Zarlink Semiconductor Inc.
ZL50416
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