zl50416 Zarlink Semiconductor, zl50416 Datasheet - Page 97

• Manufacturer Part Number: zl50416
• Description: Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
• Manufacturer: Zarlink Semiconductor

13.12.4
CPU Address:hF03
Accessed by CPU and serial interface (R/W)
13.12.5
CPU Address: hF04
Accessed by CPU and serial interface (RO)
This register provides various internal information as selected in DPST bit[4:0].
Application Note.
When bit is 1:
Bit[0] – Flow control enable
Bit[1] – Full duplex port
Bit[2] – Fast Ethernet port
Bit[3] – Link is down
Bit[7:4] – Reserved
13.12.6
CPU Address: hF05
Accessed by serial interface (RW)
Bit[3] - Must be '1'
Bit[4:0]:
DPST – Device Port Status Register
DTST – Data Read Back Register
PLLCR - PLL Control Register
7
Read back index register. This is used for selecting what to read back from
DTST. (Default 00)
- 5’b00000 - Port 0 Operating mode and Negotiation status
- 5’b00001 - Port 1 Operating mode and Negotiation status
- 5’b00010 - Port 2 Operating mode and Negotiation status
- 5’b00011 - Port 3 Operating mode and Negotiation status
- 5’b00100 - Port 4 Operating mode and Negotiation status
- 5’b00101 - Port 5 Operating mode and Negotiation status
- 5’b00110 - Port 6 Operating mode and Negotiation status
- 5’b00111 - Port 7 Operating mode and Negotiation status
- 5’b01000 - Port 8 Operating mode and Negotiation status
- 5’b01001 - Port 9 Operating mode and Negotiation status
- 5’b01010 - Port 10 Operating mode and Negotiation status
- 5’b01011 - Port 11 Operating mode and Negotiation status
- 5’b01100 - Port 12 Operating mode and Negotiation status
- 5’b01101 - Port 13 Operating mode and Negotiation status
- 5’b01110 - Port 14 Operating mode and Negotiation status
- 5’b01111 - Port 15 Operating mode and Negotiation status
- 5’b10xxx - Reserved
- 5’b11000 - Port 24 Operating mode/Neg status (CPU port)
4
Zarlink Semiconductor Inc.
ZL50416
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FcEn
0
Refer to the PHY Control
Data Sheet