zl50416 Zarlink Semiconductor, zl50416 Datasheet - Page 95

• Manufacturer Part Number: zl50416
• Description: Managed 16-port 10/100 M + 2-port 1 G Ethernet Switch
• Manufacturer: Zarlink Semiconductor

13.11.3
CPU Address 702
Accessed by CPU, serial interface (R/W) (Default FF)
13.11.4
CPU Address 703
Accessed by CPU, serial interface (R/W) (Default 00)
13.12
13.12.1
CPU Address: hF00
Accessed by CPU and serial interface. (R/W)
(Group F Address) CPU Access Group
•
•
•
•
•
Bit [0]:
Bit[1]:
Bit[2]:
MIRROR2_SRC – Port Mirror source port
MIRROR2_DEST – Port Mirror destination
GCR-Global Control Register
Bit [4:0]:
Bit [5]:
Bit [6]
Bit [7]
Bit [4:0]:
7
7
7
6
Source port to be mirrored. Use illegal port number to disable mirroring
1 – select ingress data
0 – select egress data
Reserved
Reserved must be set to '1'
Port Mirror Destination
When port mirroring is enable, destination port can not serve as a data port.
Store configuration (Default = 0)
Write ‘1’ followed by ‘0’ to store configuration into external EEPROM
Store configuration and reset (Default = 0)
Write ‘1’ to store configuration into external EEPROM and reset chip
Start BIST (Default = 0)
Write ‘1’ followed by ‘0’ to start the device’s built-in self-test. The result is
found in the DCR register.
5
I/O
5
5
4
Src Port Select
4
Dest Port Select
Init
4
Reset
Zarlink Semiconductor Inc.
3
ZL50416
Bist
95
2
0
0
SR
1
0
SC
Data Sheet