kfm2g16q2a-deb8 Samsung Semiconductor, Inc., kfm2g16q2a-deb8 Datasheet - Page 167

• Manufacturer Part Number: kfm2g16q2a-deb8
• Description: 2gb Muxonenand A-die
• Manufacturer: Samsung Semiconductor, Inc.

7.1.1 The INT Pin to a Host General Purpose I/O
INT can be tied to a Host GPIO to detect the rising edge of INT, signaling the end of a command operation.
This can be configured to operate either synchronously or asynchronously as shown in the diagrams below.
Synchronous Mode Using the INT Pin
Asynchronous Mode Using the INT Pin
When configured to operate in an asynchronous mode, CE, AVD and OE of the MuxOneNAND are tied to corresponding pins of the Host.
CLK is tied to the Host Vss (Ground). RDY is tied to a no-connect. OE of the MuxOneNAND and Host are tied together and INT is tied to a
GPIO.
MuxOneNAND2G(KFM2G16Q2A-DEBx)
MuxOneNAND4G(KFN4G16Q2A-DEBx)
When operating synchronously, INT is tied directly to a Host GPIO. RDY could be connected as one of following guides.
RDY(WAIT)
Host
GPIO
CLK
AVD
Handshaking Mode
CE
OE
COMMAND
INT
MuxOneNAND
RDY
CE
AVD
CLK
OE
INT
Host
GPIO
Vss
AVD
OE
CE
- 167 -
MuxOneNAND
CE
AVD
CLK
RDY
OE
INT
Host
GPIO
CLK
AVD
CE
OE
Non-Handshaking Mode
MuxOneNAND
CE
AVD
CLK
RDY
OE
INT
FLASH MEMORY