kfm2g16q2a-deb8 Samsung Semiconductor, Inc., kfm2g16q2a-deb8 Datasheet - Page 78
kfm2g16q2a-deb8
Manufacturer Part Number
kfm2g16q2a-deb8
Description
2gb Muxonenand A-die
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.KFM2G16Q2A-DEB8.pdf
(173 pages)
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2.8.26 ECC Status Register FF00h (R)
This Read register shows the Error Correction Status. The MuxOneNAND can detect 1- or 2-bit errors and correct 1-bit errors. 3-bit or more
error detection and correction is not supported.
ECC can be performed on the NAND Flash main and spare memory areas. The ECC status register can also show the number of errors in a
sector as a result of an ECC check in during a load operation. ECC status bits are also updated during a boot loading operation.
ECC registers will be reset when another command is issued.
FF00h, default = 0000h
NOTE 1) After Synchronous Block Burst Read operation, DQ[0] shows accmulated 1bit error.
Error Status
ECC Information[15:0]
MuxOneNAND2G(KFM2G16Q2A-DEBx)
MuxOneNAND4G(KFN4G16Q2A-DEBx)
15
ERm3
ERm0
ERm1
ERm2
ERm3
ERs0
ERs1
ERs2
ERs3
Item
14
13
ERs3
2nd selected sector of
2nd selected sector of
3rd selected sector of
4th selected sector of
3rd selected sector of
4th selected sector of
1st selected sector of
1st selected sector of
the spare BufferRAM
the spare BufferRAM
the spare BufferRAM
the spare BufferRAM
the main BufferRAM
the main BufferRAM
the main BufferRAM
the main BufferRAM
12
ERm, ERs
Definition
00
01
10
11
11
ERm2
10
9
Status of errors in the 1st selected sector of the main BufferRAM
as a result of an ECC check during a load operation.
Also updated during a Bootload operation.
Status of errors in the 2nd selected sector of the main BufferRAM
as a result of an ECC check during a load operation.
Also updated during a Bootload operation.
Status of errors in the 3rd selected sector of the main BufferRAM
as a result of an ECC check during a load operation.
Also updated during a Bootload operation.
Status of errors in the 4th selected sector of the main BufferRAM
as a result of an ECC check during a load operation.
Also updated during a Bootload operation.
Status of errors in the 1st selected sector of the spare BufferRAM
as a result of an ECC check during a load operation.
Also updated during a Bootload operation.
Status of errors in the 2nd selected sector of the spare BufferRAM
Also updated during a Bootload operation.
Status of errors in the 3rd selected sector of the spare BufferRAM
as a result of an ECC check during a load operation.
Also updated during a Bootload operation.
Status of errors in the 4th selected sector of the spare BufferRAM
Also updated during a Bootload operation.
as a result of an ECC check during a load operation.
as a result of an ECC check during a load operation.
ERs2
8
- 78 -
7
ERm1
6
5
Description
2 bit error (uncorrectable)
ERs1
1 bit error(correctable)
ECC Status
4
Reserved
No Error
3
FLASH MEMORY
ERm0
2
1
ERs0
1)
0
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