ST72F324BJ STMICROELECTRONICS [STMicroelectronics], ST72F324BJ Datasheet - Page 120

• Manufacturer Part Number: ST72F324BJ
• Description: 8-bit MCU, 3.8 to 5.5 V operating range with 8 to 32 Kbyte Flash/ROM, 10-bit ADC, 4 timers, SPI, SCI
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

On-chip peripherals
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SCI Baud Rate Register (SCIBRR)
Table 64.
SCI Extended Receive Prescaler Division Register (SCIERPR)
This register is used to set the Extended Prescaler rate division factor for the receive circuit.
SCIBRR
SCIERPR
7:6 SCP[1:0]
5:3 SCT[2:0]
2:0 SCR[2:0]
Bit
7
7
Name
SCP[1:0]
R/W
SCIBRR register description
First SCI Prescaler
SCI Transmitter rate divisor
SCI Receiver rate divisor
6
6
These 2 prescaling bits allow several standard clock division ranges.
00: PR prescaling factor = 1
01: PR prescaling factor = 3
10: PR prescaling factor = 4
11: PR prescaling factor = 13
These 3 bits, in conjunction with the SCP1 and SCP0 bits, define the total division
applied to the bus clock to yield the transmit rate clock in conventional baud rate
generator mode.
000: TR dividing factor = 1
001: TR dividing factor = 2
010: TR dividing factor = 4
011: TR dividing factor = 8
100: TR dividing factor = 16
101: TR dividing factor = 32
110: TR dividing factor = 64
111: TR dividing factor = 128
These 3 bits, in conjunction with the SCP[1:0] bits, define the total division applied
to the bus clock to yield the receive rate clock in conventional baud rate generator
mode.
000: RR dividing factor = 1
001: RR dividing factor = 2
010: RR dividing factor = 4
011: RR dividing factor = 8
100: RR dividing factor = 16
101: RR dividing factor = 32
110: RR dividing factor = 64
111: RR dividing factor = 128
5
5
SCT[2:0]
R/W
4
4
ERPR[7:0]
R/W
Function
3
3
2
2
Reset value: 0000 0000 (00h)
Reset value: 0000 0000 (00h)
SCR[2:0]
R/W
1
1
ST72324B
0
0