ST72F324BJ STMICROELECTRONICS [STMicroelectronics], ST72F324BJ Datasheet - Page 83

• Manufacturer Part Number: ST72F324BJ
• Description: 8-bit MCU, 3.8 to 5.5 V operating range with 8 to 32 Kbyte Flash/ROM, 10-bit ADC, 4 timers, SPI, SCI
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

ST72324B
10.3.4
10.3.5
Low power modes
Table 45.
Interrupts
Table 46.
1. The 16-bit timer interrupt events are connected to the same interrupt vector (see
Input Capture 1 event/counter
reset in PWM mode
Input Capture 2 event
Output Compare 1 event
(not available in PWM mode)
Output Compare 2 event
(not available in PWM mode)
Timer Overflow event
Mode
These events generate an interrupt if the corresponding Enable Control bit is set and the interrupt mask in
the CC register is reset (RIM instruction).
Wait
Halt
Interrupt event
No effect on 16-bit timer.
Timer interrupts cause the device to exit from Wait mode.
16-bit timer registers are frozen.
In Halt mode, the counter stops counting until Halt mode is exited. Counting resumes
from the previous count when the MCU is woken up by an interrupt with Exit from Halt
mode capability or from the counter reset value when the MCU is woken up by a reset.
If an input capture event occurs on the ICAPi pin, the input capture detection circuitry is
armed. Consequently, when the MCU is woken up by an interrupt with Exit from Halt
mode capability, the ICFi bit is set, and the counter value present when exiting from Halt
mode is captured into the ICiR register.
Effect of low power modes on 16-bit timer
16-bit timer interrupt control/wake-up capability
Event flag Enable Control bit Exit from WAIT Exit from HALT
OCF1
OCF2
ICF1
ICF2
TOF
Description
OCIE
TOIE
ICIE
(1)
Yes
Section 7:
On-chip peripherals
Interrupts).
No
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