ST72F324BJ STMICROELECTRONICS [STMicroelectronics], ST72F324BJ Datasheet - Page 75

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ST72F324BJ

Manufacturer Part Number
ST72F324BJ
Description
8-bit MCU, 3.8 to 5.5 V operating range with 8 to 32 Kbyte Flash/ROM, 10-bit ADC, 4 timers, SPI, SCI
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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ST72324B
Note:
1
2
3
4
5
6
After reading the ICiHR register, transfer of input capture data is inhibited and ICFi will never
be set until the ICiLR register is also read.
The ICiR register contains the free running counter value which corresponds to the most
recent input capture.
The two input capture functions can be used together even if the timer also uses the two
output compare functions.
In One pulse mode and PWM mode only Input Capture 2 can be used.
The alternate inputs (ICAP1 and ICAP2) are always directly connected to the timer. So any
transitions on these pins activates the input capture function.
Moreover if one of the ICAPi pins is configured as an input and the second one as an output,
an interrupt can be generated if the user toggles the output pin and if the ICIE bit is set.
This can be avoided if the input capture function i is disabled by reading the ICiHR (see
note 1).
The TOF bit can be used with interrupt generation in order to measure events that go
beyond the timer range (FFFFh).
Figure 41. Input capture block diagram
Figure 42. Input capture timing diagram
ICAP1
ICAP2
pin
pin
Note: The rising edge is the active edge.
Counter register
ICAPi register
16-bit
Timer clock
ICAPi flag
IC2R register
16-bit free running counter
ICAPi pin
Edge Detect
circuit 2
FF01
Edge Detect
circuit 1
IC1R register
FF02
ICIE
ICF1
FF03
ICF2
FF03
(Control register 1) CR1
On-chip peripherals
(Control register 2) CR2
CC1
(Status register) SR
CC0
0
IEDG1
IEDG2
0
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