ST72F324BJ STMICROELECTRONICS [STMicroelectronics], ST72F324BJ Datasheet - Page 128

• Manufacturer Part Number: ST72F324BJ
• Description: 8-bit MCU, 3.8 to 5.5 V operating range with 8 to 32 Kbyte Flash/ROM, 10-bit ADC, 4 timers, SPI, SCI
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Instruction set
11
11.1
Table 75.
128/188
Inherent
Immediate
Short
Long
No offset
Short
Long
Short
Long
Short
Long
Instruction set
CPU addressing modes
The CPU features 17 different addressing modes which can be classified in 7 main groups
(see
Table 74.
The CPU Instruction Set is designed to minimize the number of bytes required per
instruction: To do so, most of the addressing modes may be divided in two submodes called
long and short:
●
●
The ST7 Assembler optimizes the use of long and short addressing modes.
CPU addressing mode overview
Mode
Direct
Direct
Direct
Direct
Direct
Indirect
Indirect
Indirect
Indirect
Inherent
Immediate
Direct
Indexed
Indirect
Relative
Bit operation
:
Long addressing mode is more powerful because it can use the full 64 Kbyte address
space, however it uses more bytes and more CPU cycles.
Short addressing mode is less powerful because it can generally only access page
zero (0000h - 00FFh range), but the instruction size is more compact, and faster. All
memory to memory instructions use short addressing modes only (CLR, CPL, NEG,
BSET, BRES, BTJT, BTJF, INC, DEC, RLC, RRC, SLL, SRL, SRA, SWAP)
Table
Indexed
Indexed
Indexed
Indexed
Indexed
74).
Addressing mode groups
Addressing mode
nop
ld A,#$55
ld A,$10
ld A,$1000
ld A,(X)
ld A,($10,X)
ld A,($1000,X)
ld A,[$10]
ld A,[$10.w]
ld A,([$10],X)
ld A,([$10.w],X)
Syntax
00..FF
0000..FFFF
00..1FE
0000..FFFF
00..FF
0000..FFFF
00..1FE
00..FF
0000..FFFF
Destination
nop
ld A,#$55
ld A,$55
ld A,($55,X)
ld A,([$55],X)
jrne loop
bset byte,#5
Pointer address
00..FF
00..FF
00..FF
00..FF
(Hex.)
Example
Pointer size
(Hex.)
word
word
byte
byte
ST72324B
Length
(bytes)
+ 0
+ 1
+ 1
+ 2
+ 0
+ 1
+ 2
+ 2
+ 2
+ 2
+ 2