ST72F324BJ STMICROELECTRONICS [STMicroelectronics], ST72F324BJ Datasheet - Page 27

• Manufacturer Part Number: ST72F324BJ
• Description: 8-bit MCU, 3.8 to 5.5 V operating range with 8 to 32 Kbyte Flash/ROM, 10-bit ADC, 4 timers, SPI, SCI
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

ST72324B
Figure 12. Clock, reset and supply block diagram
6.3
Caution:
6.3.1
RESET
OSC2
OSC1
V
V
DD
SS
Multi-oscillator (MO)
The main clock of the ST7 can be generated by three different source types coming from the
multi-oscillator block:
●
●
●
Each oscillator is optimized for a given frequency range in terms of consumption and is
selectable through the option byte. The associated hardware configurations are shown in
Table
The OSC1 and/or OSC2 pins must not be left unconnected. For the purposes of Failure
Mode and Effect Analysis, it should be noted that if the OSC1 and/or OSC2 pins are left
unconnected, the ST7 main oscillator may start and, in this configuration, could generate an
f
unsafe/undefined state. The product behavior must therefore be considered undefined when
the OSC pins are left unconnected.
External clock source
In this external clock mode, a clock signal (square, sinus or triangle) with ~50% duty cycle
has to drive the OSC1 pin while the OSC2 pin is tied to ground.
OSC
an external source
4 crystal or ceramic resonator oscillators
an internal high frequency RC oscillator
clock frequency in excess of the allowed maximum (> 16 MHz.), putting the ST7 in an
8. Refer to the electrical characteristics section for more details.
Reset Sequence
Oscillator
Multi-
(MO)
Manager
(RSM)
f
OSC
(option)
PLL
SICSR
0
System Integrity Management
AVD AVD LVD
IE
AVD Interrupt Request
F
Auxiliary Voltage
Low Voltage
RF
Detector
Detector
(AVD)
(LVD)
Supply, reset and clock management
0
0
0
WDG
f
RF
OSC2
Clock (MCC/RTC)
with Real-time
timer (WDG)
Main Clock
Watchdog
Controller
27/188
f
CPU