ST72F324BJ STMICROELECTRONICS [STMicroelectronics], ST72F324BJ Datasheet - Page 15

• Manufacturer Part Number: ST72F324BJ
• Description: 8-bit MCU, 3.8 to 5.5 V operating range with 8 to 32 Kbyte Flash/ROM, 10-bit ADC, 4 timers, SPI, SCI
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

ST72324B
3
Caution:
Table 2.
Address
000Ah
000Bh
000Ch
000Dh
000Eh
0000h
0001h
0002h
0003h
0004h
0005h
0006h
0007h
0008h
0009h
Port A
Port B
Port D
Port E
Register and memory map
As shown in
registers.
The available memory locations consist of 128 bytes of register locations, up to 1024 bytes
of RAM and up to 32 Kbytes of user program memory. The RAM space includes up to 256
bytes for the stack from 0100h to 01FFh.
The highest address bytes contain the user reset and interrupt vectors.
Never access memory locations marked as ‘Reserved’. Accessing a reserved area can
have unpredictable effects on the device.
Figure 6.
Hardware register map
Port C
Block
(1)
(1)
(1)
(1)
FFFFh
FFDFh
FFE0h
0080h
7FFFh
0000h
007Fh
047Fh
0480h
8000h
PADR
PADDR
PAOR
PBDR
PBDDR
PBOR
PCDR
PCDDR
PCOR
PDADR
PDDDR
PDOR
PEDR
PEDDR
PEOR
Register label
Interrupt and reset vectors
Figure
Memory map
(1024, 512 or 384 bytes)
(32, 16 or 8 Kbytes)
Program memory
(see
HW registers
(see
Reserved
6, the MCU is capable of addressing 64 Kbytes of memories and I/O
RAM
Table
Table
24)
2)
Port A data register
Port A data direction register
Port A option register
Port B data register
Port B data direction register
Port B option register
Port C data register
Port C data direction register
Port C option register
Port D data register
Port D data direction register
Port D option register
Port E data register
Port E data direction register
Port E option register
or 047Fh
Register name
00FFh
01FFh
027Fh
0080h
0100h
0200h
RAM (zero page)
16-bit addressing
Short addressing
256 bytes stack
RAM
Register and memory map
8000h
C000h
E000h
FFFFh
Reset status
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
32 Kbytes
16 Kbytes
8 Kbytes
(2)
(2)
(2)
(2)
(2)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Remarks
(1)
(1)
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