sed1374 ETC-unknow, sed1374 Datasheet - Page 328

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sed1374

Manufacturer Part Number
sed1374
Description
Sed1374 Embedded Memory Color Lcd Controller
Manufacturer
ETC-unknow
Datasheet

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Page 14
4.3 PAL Equations
PAL
OE
WE
CE1
CE2
REG
PCRESET
RESET
WE0
WE1
RD
RDWR
CS
equations
!WE0 = !WE & !CE1 & REG;
!WE1 = !WE & !CE2 & REG;
!CS = REG & (!RD # !RDWR # !WE0 # !WE1);
!RD = !OE & !CE1 & REG;
!RDWR = !OE & !CE2 & REG;
!RESET = PCRESET;
4.4 Register/Memory Mapping
SED1374
X26A-G-009-02
device
‘16L8’;
Note
The PAL equations
The SED1374 is a memory mapped device. The SED1374 memory may be addressed
starting at 0000h, or on consecutive 64K byte blocks, and its internal registers are located
in the upper 32 bytes of the 64K byte block (i.e. REG[0] = FFE0h).
While the PC Card socket provides 64M bytes of address space, the SED1374 only needs
a 64K byte block of memory to accommodate its 40K byte display buffer and its 32 byte
register set. For this reason only address bits A[15:0] are used while A[25:16] are ignored.
Because the entire 64M bytes of memory is available, the SED1374’s memory and registers
will be aliased every 64K bytes for a total of 1024 times.
If aliasing is not desirable, the upper addresses must be fully decoded.
for the implementation presented in this document are as follows.
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
14;
15;
16;
17;
18;
19;
1;
2;
3;
4;
5;
6;
Epson Research and Development
Interfacing to the PC Card Bus
Vancouver Design Center
Issue Date: 98/12/10

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