sed1374 ETC-unknow, sed1374 Datasheet - Page 77
sed1374
Manufacturer Part Number
sed1374
Description
Sed1374 Embedded Memory Color Lcd Controller
Manufacturer
ETC-unknow
Datasheet
1.SED1374.pdf
(420 pages)
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bits 7-0
REG[1Eh] and REG[1Fh]
Hardware Functional Specification
Issue Date: 99/04/29
REG[1Ch] Line Byte Count Register for SwivelView Mode
Address = FFFCh
Count bit 7
Line Byte
Count bit 6
Line Byte
Mode Enable
(REG[1Bh] bit 7)
SwivelView
0
1
1
1
1
1
1
1
1
REG[1Eh] and REG[1Fh] are reserved for factory SED1374 testing and should not be
written. Any value written to these registers may result in damage to the SED1374 and/or
any panel connected to the SED1374.
Line Byte Count Bits [7:0]
This register is the byte count from the beginning of one line to the beginning of the next
consecutive line (commonly called “stride” by programmers). This register may be used to
create a virtual image in SwivelView mode.
Count bit 5
Line Byte
Table 8-9: Selection of PCLK and MCLK in SwivelView Mode
(REG[1Bh] bit 6)
Mode Select
SwivelView
X
0
0
0
0
1
1
1
1
Count bit 4
Line Byte
Pixel Clock (PCLK) Select
Where CLK is CLKI (REG[02h] bit 4 = 0) or CLKI/2 (REG[02h] bit 4 = 1)
Bit 1
(REG[1Bh] bits [1:0]
X
0
0
1
1
0
0
1
1
Count bit 3
Line Byte
Bit 0
X
0
1
0
1
0
1
0
1
Count bit 2
Line Byte
PCLK =
CLK/2
CLK/4
CLK/8
CLK/2
CLK/2
CLK/4
CLK/8
CLK
CLK
Count bit
Line Byte
See Reg[02h] bit 5
1
MCLK =
Read/Write
CLK/2
CLK/4
CLK/8
CLK/2
CLK/4
X26A-A-001-02
Count bit
CLK
CLK
CLK
Line Byte
SED1374
Page 69
0
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