MC68HC05P9ACDW FREESCALE [Freescale Semiconductor, Inc], MC68HC05P9ACDW Datasheet - Page 114

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MC68HC05P9ACDW

Manufacturer Part Number
MC68HC05P9ACDW
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
SIOP
SIOP Status
Register
114
The read-only SIOP status register (SSR) contains two bits. One bit
indicates that a SIOP transfer is complete, and the other indicates that
an invalid access of the SIOP data register occurred while a transfer was
in progress.
SPIF — Serial Peripheral Interface Flag
$000B
Reset:
Read:
Write:
This clearable, read-only bit is set automatically on the eighth rising
edge on the PB7/SCK pin and indicates that a data transmission took
place. SPIF does not inhibit further transmissions. Clear SPIF by
reading the SIOP status register while SPIF is set and then reading or
writing the SIOP data register. Reset clears SPIF.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Transmission complete
0 = Transmission not complete
SPIF
Bit 7
0
Go to: www.freescale.com
Figure 65. SIOP Status Register (SSR)
= Unimplemented
DCOL
6
0
SIOP
5
0
0
4
0
0
3
0
0
2
0
0
1
0
0
16-mc68hc05p9a
MOTOROLA
Bit 0
0
0

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