MC68HC05P9ACDW FREESCALE [Freescale Semiconductor, Inc], MC68HC05P9ACDW Datasheet - Page 78

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MC68HC05P9ACDW

Manufacturer Part Number
MC68HC05P9ACDW
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Parallel I/O Ports
78
When bit DDRDx is a logic 1, reading address $0003 reads the PDx data
latch. When bit DDRDx is a logic 0, reading address $0003 reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit.
of the port D pins.
Freescale Semiconductor, Inc.
For More Information On This Product,
Data Direction Bit
1. Hi-Z = high impedance
2. Writing affects data register, but does not affect input.
Go to: www.freescale.com
Parallel I/O Ports
0
1
Table 18. Port D Pin Operation
I/O Pin Mode
Input, Hi-Z
Output
Table 16
(1)
Accesses to Data Bit
Read
Latch
Pin
summarizes the operation
Latch
Write
Latch
(2)
18-mc68hc05p9a
MOTOROLA

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