MC68HC05P9ACDW FREESCALE [Freescale Semiconductor, Inc], MC68HC05P9ACDW Datasheet - Page 55

no-image

MC68HC05P9ACDW

Manufacturer Part Number
MC68HC05P9ACDW
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Timer Interrupts
Input Capture
Interrupt
Output Compare
Interrupt
11-mc68hc05p9a
MOTOROLA
The capture/compare timer can generate the following interrupts:
Setting the I bit in the condition code register disables timer interrupts.
An input capture interrupt request occurs if the input capture flag, ICF,
becomes set while the input capture interrupt enable bit, ICIE, is also set.
ICF is in the timer status register, and ICIE is in the timer control register.
An output compare interrupt request occurs if the output compare flag,
OCF, becomes set while the output compare interrupt enable bit, OCIE,
is also set. OCF is in the timer status register, and OCIE is in the timer
control register.
Interrupt Pulse Width Low (Edge-Triggered)
Interrupt Pulse Period
Interrupt Pulse Width Low (Edge-Triggered)
Interrupt Pulse Period
1. V
2. The minimum t
1. V
2. The minimum t
Freescale Semiconductor, Inc.
plus 19 t
plus 19 t
DD
DD
For More Information On This Product,
Input capture interrupt
Output compare interrupt
Timer overflow interrupt
= 5.0 Vdc 10%, V
= 3.3 Vdc 10%, V
Table 12. External Interrupt Timing (V
Table 13. External Interrupt Timing (V
CYC
CYC
.
.
Go to: www.freescale.com
Characteristic
Characteristic
ILIL
ILIL
Resets and Interrupts
should not be less than the number of interrupt service routine cycles
should not be less than the number of interrupt service routine cycles
SS
SS
= 0 Vdc, T
= 0 Vdc, T
A
A
= T
= T
L
L
to T
to T
H
H
Symbol
Symbol
t
t
t
t
ILIH
ILIH
ILIL
ILIL
DD
DD
= 5.0 Vdc)
= 3.3 Vdc)
Note
Note
Min
Min
125
250
Resets and Interrupts
(2)
(2)
Max
Max
(1)
(1)
Interrupts
Unit
Unit
t
t
ns
CYC
ns
CYC
55

Related parts for MC68HC05P9ACDW