MC68HC05P9ACDW FREESCALE [Freescale Semiconductor, Inc], MC68HC05P9ACDW Datasheet - Page 53

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MC68HC05P9ACDW

Manufacturer Part Number
MC68HC05P9ACDW
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Interrupts
Software
Interrupt
External
Interrupt
9-mc68hc05p9a
MOTOROLA
The following sources can generate interrupts:
An interrupt temporarily stops normal program execution to process a
particular event. An interrupt does not stop the operation of the
instruction being executed, but takes effect when the current instruction
completes its execution. Interrupt processing automatically saves the
CPU registers on the stack and loads the program counter with a
user-defined interrupt vector address.
The software interrupt (SWI) instruction causes a non-maskable
interrupt.
An interrupt signal on the IRQ pin latches an external interrupt request.
When the CPU completes its current instruction, it tests the IRQ latch. If
the IRQ latch is set, the CPU then tests the I bit in the condition code
register. If the I bit is clear, the CPU then begins the interrupt sequence.
The CPU clears the IRQ latch during interrupt processing, so that
another interrupt signal on the IRQ pin can latch another interrupt
request during the interrupt service routine. As soon as the I bit is
cleared during the return from interrupt, the CPU can recognize the new
interrupt request.
Freescale Semiconductor, Inc.
For More Information On This Product,
SWI instruction
IRQ pin
Capture/compare timer
Go to: www.freescale.com
Resets and Interrupts
Figure 20
shows the IRQ pin interrupt logic.
Resets and Interrupts
Interrupts
53

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