MC68HC05P9ACDW FREESCALE [Freescale Semiconductor, Inc], MC68HC05P9ACDW Datasheet - Page 63

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MC68HC05P9ACDW

Manufacturer Part Number
MC68HC05P9ACDW
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Wait Mode
9-mc68hc05p9a
MOTOROLA
The WAIT instruction puts the MCU in an intermediate
power-consumption mode and has the following effects on the MCU:
The WAIT instruction does not affect any other registers or any I/O lines.
The following conditions restart the CPU clock and bring the MCU out of
wait mode:
Figure 26
instruction.
Figure 27
CPU clock and the timer clock.
Freescale Semiconductor, Inc.
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Clears the I bit in the condition code register, enabling interrupts
Stops the CPU clock, but allows the internal clock to drive the
capture/compare timer, the COP watchdog, and the ADC
External interrupt — A high-to-low transition on the IRQ pin loads
the program counter with the contents of locations $1FFA and
$1FFB.
Timer interrupt — Input capture, output compare, and timer
overflow interrupt requests load the program counter with the
contents of locations $1FF8 and $1FF9.
COP watchdog reset — A timeout of the COP watchdog resets the
MCU and loads the program counter with the contents of locations
$1FFE and $1FFF. Software can enable timer interrupts so that
the MCU can periodically exit wait mode to reset the COP
watchdog.
External reset — A logic 0 on the RESET pin resets the MCU and
loads the program counter with the contents of locations $1FFE
and $1FFF.
shows the sequence of events caused by the WAIT
shows the effect of the STOP and WAIT instructions on the
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Low-Power Modes
Low-Power Modes
Wait Mode
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