MC68HC05P9ACDW FREESCALE [Freescale Semiconductor, Inc], MC68HC05P9ACDW Datasheet - Page 74

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MC68HC05P9ACDW

Manufacturer Part Number
MC68HC05P9ACDW
Description
HCMOS Microcontroller Unit
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Parallel I/O Ports
Data Direction
Register C (DDRC)
74
NOTE:
Data direction register C determines whether each port C pin is an input
or an output.
DDRC[7:0] — Data Direction Register C Bits
Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1.
Writing to bits DDRC7–DDRC3 while the ADC is on can produce
unpredictable ADC results.
Figure 37
Reset:
$0006
Read:
Write:
The port C data register reads normally while the ADC is on, except
that the bit corresponding to the currently selected ADC input pin
reads as logic 0.
Writing to bits PC7–PC3 while the ADC is on can produce
unpredictable ADC results.
These read/write bits control port C data direction. Reset clears
DDRC[7:0], configuring all port C pins as inputs.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
DDRC7
Bit 7
0
shows the I/O logic of port C.
Figure 36. Data Direction Register C (DDRC)
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DDRC6
Parallel I/O Ports
6
0
DDRC5
5
0
DDRC4
4
0
DDRC3
3
0
DDRC2
2
0
DDRC1
1
0
14-mc68hc05p9a
MOTOROLA
DDRC0
Bit 0
0

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