PIC18F24J10-E/ML MICROCHIP [Microchip Technology], PIC18F24J10-E/ML Datasheet - Page 200

• Manufacturer Part Number: PIC18F24J10-E/ML
• Description: 28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F45J10 FAMILY
FIGURE 16-4:
FIGURE 16-5:
TABLE 16-5:
DS39682C-page 198
INTCON
PIR1
PIE1
IPR1
RCSTA
TXREG
TXSTA
BAUDCON
SPBRGH
SPBRG
Legend: — = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous transmission.
Note 1:
Note: This timing diagram shows two consecutive transmissions.
(Interrupt Reg. Flag)
Reg. Empty Flag)
Reg. Empty Flag)
Write to TXREG
(Transmit Buffer
Reg. Empty Flag)
Name
(Transmit Shift
Write to TXREG
(Transmit Shift
BRG Output
(Shift Clock)
BRG Output
(Shift Clock)
TRMT bit
TX (pin)
TXIF bit
TRMT bit
These bits are not implemented on 28-pin devices and should be read as ‘0’.
TX (pin)
TXIF bit
EUSART Transmit Register
EUSART Baud Rate Generator Register High Byte
EUSART Baud Rate Generator Register Low Byte
GIE/GIEH PEIE/GIEL TMR0IE
ABDOVF
PSPIE
PSPIP
PSPIF
SPEN
CSRC
Bit 7
REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
1 T
(1)
(1)
(1)
ASYNCHRONOUS TRANSMISSION
ASYNCHRONOUS TRANSMISSION (BACK TO BACK)
CY
Word 1
Transmit Shift Reg
Transmit Shift Reg.
Word 1
Word 1
Word 1
RCIDL
ADIE
ADIP
Bit 6
ADIF
RX9
TX9
1 T
CY
Start bit
Start bit
Word 2
SREN
TXEN
RCIF
RCIE
RCIP
Bit 5
—
1 T
CY
bit 0
bit 0
Preliminary
INT0IE
CREN
SYNC
SCKP
TXIE
TXIP
Bit 4
TXIF
bit 1
Word 1
bit 1
Word 1
SSP1IF
SSP1IE
SSP1IP
ADDEN
SENDB
BRG16
RBIE
Bit 3
TMR0IF
CCP1IE
CCP1IP
CCP1IF
BRGH
FERR
Bit 2
—
bit 7/8
bit 7/8
Word 2
Transmit Shift Reg.
TMR2IE
TMR2IP
TMR2IF
Stop bit
INT0IF
OERR
TRMT
© 2007 Microchip Technology Inc.
WUE
Bit 1
Stop bit
Start bit
TMR1IE
TMR1IP
TMR1IF
ABDEN
RX9D
TX9D
RBIF
Bit 0
Word 2
on page
Values
bit 0
Reset
43
45
45
45
45
45
45
45
45
45