PIC18F25K80 MICROCHIP [Microchip Technology], PIC18F25K80 Datasheet - Page 137

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PIC18F25K80

Manufacturer Part Number
PIC18F25K80
Description
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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REGISTER 7-1:
 2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
EEPGD
R/W-x
When a WRERR occurs, the EEPGD and CFGS bits are not cleared. This allows tracing of the error
condition.
EEPGD: Flash Program or Data EEPROM Memory Select bit
1 = Access Flash program memory
0 = Access data EEPROM memory
CFGS: Flash Program/Data EEPROM or Configuration Select bit
1 = Access Configuration registers
0 = Access Flash program or data EEPROM memory
Unimplemented: Read as ‘ 0 ’
FREE: Flash Row Erase Enable bit
1 = Erase the program memory row addressed by TBLPTR on the next WR command
0 = Perform write-only
WRERR: Flash Program/Data EEPROM Error Flag bit
1 = A write operation is prematurely terminated (any Reset during self-timed programming in normal
0 = The write operation completed
WREN: Flash Program/Data EEPROM Write Enable bit
1 = Allows write cycles to Flash program/data EEPROM
0 = Inhibits write cycles to Flash program/data EEPROM
WR: Write Control bit
1 = Initiates a data EEPROM erase/write cycle or, a program memory erase cycle or write cycle.
0 = Write cycle to the EEPROM is complete
RD: Read Control bit
1 = Initiates an EEPROM read (Read takes one cycle. RD is cleared in hardware. The RD bit can only
0 = Does not initiate an EEPROM read
CFGS
R/W-x
(cleared by completion of erase operation)
operation or an improper write attempt)
(The operation is self-timed and the bit is cleared by hardware once the write is complete.
The WR bit can only be set (not cleared) in software.)
be set (not cleared) in software. RD bit cannot be set when EEPGD = 1 or CFGS = 1 .)
EECON1: EEPROM CONTROL REGISTER 1
S = Settable bit
W = Writable bit
‘1’ = Bit is set
U-0
R/W-0
FREE
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F66K80 FAMILY
WRERR
R/W-x
(1)
(1)
WREN
R/W-0
x = Bit is unknown
R/S-0
WR
DS39977C-page 137
R/S-0
RD
bit 0

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