PIC18F25K80 MICROCHIP [Microchip Technology], PIC18F25K80 Datasheet - Page 272

• Manufacturer Part Number: PIC18F25K80
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F66K80 FAMILY
REGISTER 20-1:
DS39977C-page 272
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3-0
R/W-0
P1M1
P1M<1:0>: Enhanced PWM Output Configuration bits
If CCP1M<3:2> = 00 , 01 , 10 :
xx = P1A assigned as capture/compare input/output; P1B, P1C and P1D assigned as port pins
If CCP1M<3:2> = 11 :
00 = Single output: P1A, P1B, P1C and P1D controlled by steering (see
01 = Full-bridge output forward: P1D modulated; P1A active; P1B, P1C inactive
10 = Half-bridge output: P1A, P1B modulated with dead-band control; P1C and P1D assigned as
11 = Full-bridge output reverse: P1B modulated; P1C active; P1A and P1D inactive
DC1B<1:0> : PWM Duty Cycle bit 1 and bit 0
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs of the 10-bit PWM duty cycle. The eight MSbs of the duty cycle are found
in CCPR1L.
CCP1M<3:0> : ECCP1 Mode Select bits
0000 = Capture/Compare/PWM off (resets ECCP1 module)
0001 = Reserved
0010 = Compare mode, toggle output on match
0011 = Capture mode
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every fourth rising edge
0111 = Capture mode, every 16
1000 = Compare mode, initialize ECCP1 pin low, set output on compare match (set CCP1IF)
1001 = Compare mode, initialize ECCP1 pin high, clear output on compare match (set CCP1IF)
1010 = Compare mode, generate software interrupt only, ECCP1 pin reverts to I/O state
1011 = Compare mode, trigger special event (ECCP1 resets TMR1 or TMR3, starts A/D conversion,
1100 = PWM mode; P1A and P1C active-high; P1B and P1D active-high
1101 = PWM mode; P1A and P1C active-high; P1B and P1D active-low
1110 = PWM mode; P1A and P1C active-low; P1B and P1D active-high
1111 = PWM mode; P1A and P1C active-low; P1B and P1D active-low
R/W-0
P1M0
Mode”
port pins
CCP1CON: ENHANCED CAPTURE/COMPARE/PWM1 CONTROL
sets CCP1IF bit)
)
W = Writable bit
‘1’ = Bit is set
DC1B1
R/W-0
DC1B0
R/W-0
th
Preliminary
rising edge
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CCP1M3
R/W-0
CCP1M2
R/W-0
Section 20.4.7 “Pulse Steering
 2011 Microchip Technology Inc.
x = Bit is unknown
CCP1M1
R/W-0
CCP1M0
R/W-0
bit 0