PIC18F25K80 MICROCHIP [Microchip Technology], PIC18F25K80 Datasheet - Page 325

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PIC18F25K80

Manufacturer Part Number
PIC18F25K80
Description
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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21.4.7.1
Clock arbitration occurs when the master, during any
receive, transmit or Repeated Start/Stop condition,
deasserts the SCL pin (SCL allowed to float high).
When the SCL pin is allowed to float high, the Baud
Rate Generator (BRG) is suspended from counting
until the SCL pin is actually sampled high. When the
FIGURE 21-20:
 2011 Microchip Technology Inc.
Clock Arbitration
SDA
SCL
BRG
Value
BRG
Reload
BAUD RATE GENERATOR TIMING WITH CLOCK ARBITRATION
03h
DX
SCL deasserted but slave holds
SCL low (clock arbitration)
02h
SCL is sampled high, reload takes
place and BRG starts its count
01h
Preliminary
BRG decrements on
Q2 and Q4 cycles
00h (hold off)
PIC18F66K80 FAMILY
SCL pin is sampled high, the Baud Rate Generator is
reloaded with the contents of SSPADD<6:0> and
begins counting. This ensures that the SCL high time
will always be at least one BRG rollover count in the
event that the clock is held low by an external device
(Figure
DX – 1
21-20).
SCL allowed to transition high
03h
02h
DS39977C-page 325

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