PIC18F25K80 MICROCHIP [Microchip Technology], PIC18F25K80 Datasheet - Page 190

• Manufacturer Part Number: PIC18F25K80
• Manufacturer: MICROCHIP [Microchip Technology]

corresponding Data Direction and Output Latch registers
PIC18F66K80 FAMILY
11.5
PORTD is an 8-bit wide, bidirectional port. The
are TRISD and LATD.
All pins on PORTD are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output.
Each of the PORTD pins has a weak internal pull-up. A
single control bit can turn off all the pull-ups. This is
performed by setting bit, RDPU (PADCFG1<7>). The
weak pull-up is automatically turned off when the port
pin is configured as an output. The pull-ups are
disabled on all device Resets.
DS39977C-page 190
Note:
Note:
PORTD, TRISD and
LATD Registers
PORTD is unavailable on 28-pin devices.
These pins are configured as digital inputs
on any device Reset.
Preliminary
PORTD can also be configured as an 8-bit wide micro-
processor port (Parallel Slave Port) by setting control
bit, PSPMODE (PSPCON<4>). In this mode, the input
buffers are ST. For additional information, see
Section 11.9 “Parallel Slave Port”
RD3 has a CTMU functionality.
EXAMPLE 11-4:
CLRF
CLRF
MOVLW
MOVWF
PORTD
LATD
0CFh
TRISD
; Initialize PORTD by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RD<3:0> as inputs
; RD<5:4> as outputs
; RD<7:6> as inputs
INITIALIZING PORTD
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