PIC18F25K80 MICROCHIP [Microchip Technology], PIC18F25K80 Datasheet - Page 483

• Manufacturer Part Number: PIC18F25K80
• Manufacturer: MICROCHIP [Microchip Technology]

28.6
The user program memory is divided into four blocks.
One of these is a boot block of 1 or 2 Kbytes. The
remainder of the memory is divided into blocks on
binary boundaries.
FIGURE 28-6:
 2011 Microchip Technology Inc.
Note 1: Sizes of memory areas are not to scale.
000000h
01FFFFh
200000h
3FFFFFh
Program Verification and
Code Protection
2: Boot block size is determined by the BBSIZ0 bit (CONFIG4L<4>).
Unimplemented
Code Memory
Configuration
Read as ‘
and ID
Space
CODE-PROTECTED PROGRAM MEMORY FOR THE PIC18F66K80 FAMILY
0
’
Preliminary
Boot Block
BBSIZ = 1 BBSIZ = 0 BBSIZ = 1 BBSIZ = 0
Block 0
Block 1
Block 2
Block 3
2 kW
6 kW
8 kW
8 kW
8 kW
PIC18F66K80 FAMILY
PIC18FX6K80
Each of the blocks has three code protection bits
associated with them. They are:
• Code-Protect bit (CPx)
• Write-Protect bit (WRTx)
• External Block Table Read bit (EBTRx)
Figure 28-6
48, 64, 96 and 128 Kbyte devices and the specific code
protection bit associated with each block. The actual
locations of the bits are summarized in
Device/Memory Size
Boot Block Boot Block
Block 0
Block 1
Block 2
Block 3
7 kW
8 kW
8 kW
8 kW
shows the program memory organization for
Block 0
Block 1
Block 2
Block 3
2 kW
2 kW
4 kW
4 kW
4 kW
PIC18FX5K80
(1)
Boot Block 0000h
Block 0
Block 1
Block 2
Block 3
3 kW
4 kW
4 kW
4 kW
DS39977C-page 483
0800h
1000h
1FFFh
2000h
3FFFh
4000h
5FFFh
6000h
7FFFh
8000h
BFFFh
C000h
FFFFh
10000h
13FFFh
14000h
17FFFh
18000h
1BFFFh
1C000h
1FFFFh
Table
Address
28-4.