FDC37M81 SMSC [SMSC Corporation], FDC37M81 Datasheet - Page 176

• Manufacturer Part Number: FDC37M81
• Description: PC98/99 Compliant Enhanced Super I/O Controller with Keyboard/Mouse Wake-Up
• Manufacturer: SMSC [SMSC Corporation]

Note:
NAME
t10
t11
t12
t13
t14
t15
t16
t1
t2
t3
t4
t5
t6
t7
t8
t9
FDRQ,
PDRQ
nDACK[x]
nIOW
nIOR
SD<7:0>
AEN
TC
PDRQ is the DMA request for the Parallel Port.
FDRQ is the DMA request for the FDC.
or
nDACK Delay Time from FDRQ High
DRQ Reset Delay from nIOR or nIOW
FDRQ Reset Delay from nDACK Low
nDACK Width
nIOR Delay from FDRQ High
nIOW Delay from FDRQ High
SData Access Time from nIOR Low
SData Set Up Time to nIOW High
SData to Float Delay from nIOR High
SData Hold Time from nIOW High
nDACK Set Up to nIOW/nIOR Low
nDACK Hold after nIOW/nIOR High
TC Pulse Width
AEN Set Up to nIOR/nIOW
AEN Hold from nDACK
TC Active to PDRQ Inactive
FIGURE 10A - DMA TIMING (SINGLE TRANSFER MODE)
DESCRIPTION
t14
t1
t6
t5
t11
176
t3
t16
t2
t7
t13
t4
MIN
150
40
10
10
10
60
40
10
0
0
0
5
t8
DATA VALID
TYP
t12
t10
t9
t15
MAX
100
100
100
100
60
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns