FDC37M81 SMSC [SMSC Corporation], FDC37M81 Datasheet - Page 182

• Manufacturer Part Number: FDC37M81
• Description: PC98/99 Compliant Enhanced Super I/O Controller with Keyboard/Mouse Wake-Up
• Manufacturer: SMSC [SMSC Corporation]

Note 1: nWAIT must be filtered to compensate for ringing on the parallel bus cable.
NAME
t10
t11
t12
t13
t14
t15
t16
t17
t18
t19
t20
t1
t2
t3
t4
t5
t6
t7
t8
t9
considered to have settled after it does not transition for a minimum of 50 nsec.
nIOW Asserted to PDATA Valid
nWAIT Asserted to nWRITE Change (Note 1)
nWRITE to Command Asserted
nWAIT Deasserted to Command Deasserted
(Note 1)
nWAIT Asserted to PDATA Invalid (Note 1)
Time Out
Command Deasserted to nWAIT Asserted
SDATA Valid to nIOW Asserted
nIOW Deasserted to SDATA Invalid
nIOW Asserted to IOCHRDY Asserted
nWAIT Deasserted to IOCHRDY Deasserted
(Note 1)
IOCHRDY Deasserted to nIOW Deasserted
nIOW Asserted to nWRITE Asserted
nWAIT Asserted to Command Asserted (Note 1)
Command Asserted to nWAIT Deasserted
PDATA Valid to Command Asserted
Ax Valid to nIOW Asserted
nIOW Asserted to Ax Invalid
nIOW Deasserted to nIOW or nIOR Asserted
nWAIT Asserted to nWRITE Asserted (Note 1)
TABLE 73 - EPP 1.9 DATA OR ADDRESS WRITE CYCLE TIMING
DESCRIPTION
182
MIN
60
60
10
10
60
10
60
10
40
10
40
60
0
5
0
0
0
0
0
0
TYP
MAX
185
190
160
210
185
50
35
12
24
70
10
WAIT is
UNITS
s
s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns