FDC37M81 SMSC [SMSC Corporation], FDC37M81 Datasheet - Page 32

• Manufacturer Part Number: FDC37M81
• Description: PC98/99 Compliant Enhanced Super I/O Controller with Keyboard/Mouse Wake-Up
• Manufacturer: SMSC [SMSC Corporation]

BIT NO.
7
6
5
4
3
2
1
0
EN
DE
OR
ND
NW
MA
SYMBOL
End of
Cylinder
Data Error
Overrun/
Underrun
No Data
Not Writeable WP pin became a "1" while the FDC is executing a
Missing
Address Mark
NAME
Table 14 - Status Register 1
The FDC tried to access a sector beyond the final
sector of the track (255D). Will be set if TC is not
issued after Read or Write Data command.
Unused. This bit is always "0".
The FDC detected a CRC error in either the ID field or
the data field of a sector.
Becomes set if the FDC does not receive CPU or DMA
service within the required time interval, resulting in
data overrun or underrun.
Unused. This bit is always "0".
Any one of the following:
1. Read Data, Read Deleted Data command - the
2. Read ID command - the FDC cannot read the ID
3. Read A Track command - the FDC cannot find the
Write Data, Write Deleted Data, or Format A Track
command.
Any one of the following:
1. The FDC did not detect an ID address mark at the
2.
32
FDC did not find the specified sector.
field without an error.
proper sector sequence.
specified track after encountering the index pulse
from the nINDEX pin twice.
deleted data address mark on the specified track.
The FDC cannot detect a data address mark or a
DESCRIPTION