FDC37M81 SMSC [SMSC Corporation], FDC37M81 Datasheet - Page 177

• Manufacturer Part Number: FDC37M81
• Description: PC98/99 Compliant Enhanced Super I/O Controller with Keyboard/Mouse Wake-Up
• Manufacturer: SMSC [SMSC Corporation]

Note:
NAME
nDACK[x]
t10
t11
t12
t13
t14
t15
t16
FDRQ,
PDRQ
SD<7:0>
t1
t2
t3
t4
t5
t6
t7
t8
t9
nIOW
nIOR
AEN
TC
or
FDRQ is the DMA request for the FDC.
PDRQ is the DMA request for the Parallel Port.
nDACK Delay Time from FDRQ High
DRQ Reset Delay from nIOR or nIOW
FDRQ Reset Delay from nDACK Low
nDACK Width
nIOR Delay from FDRQ High
nIOW Delay from FDRQ High
SData Access Time from nIOR Low
SData Set Up Time to nIOW High
SData to Float Delay from nIOR High
SData Hold Time from nIOW High
nDACK Set Up to nIOW/nIOR Low
nDACK Hold after nIOW/nIOR High
TC Pulse Width
AEN Set Up to nIOR/nIOW
AEN Hold from nDACK
TC Active to PDRQ Inactive
FIGURE 10B - DMA TIMING (BURST TRANSFER MODE)
t14
t1
t6
t5
DESCRIPTION
t11
DATA VALID
t3
177
t4
MIN
150
40
10
10
10
60
40
10
t16
0
0
0
5
t2
t7
t13
TYP
t8
DATA VALID
t12
MAX
100
100
100
100
60
t10
t9
t15
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns