MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 106

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MC68HC908KX2

Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
Internal Clock Generator Module (ICG)
7.4.2.4 Digital Loop Filter
Technical Data
106
of IBASE Compared
1. x = Maximum error is independent of value in DDIV[3:0]. DDIV increments or decrements when an addition to DSTG[7:0]
IBASE < 0.85 f
0.85 f
IBASE < 0.95 f
0.95 f
IBASE < 1.05 f
1.05 f
IBASE < 1.15 f
1.15 f
Frequency Error
IBASE < f
f
NOM
carries or borrows.
to f
NOM
NOM
NOM
NOM
< IBASE
NOM
< IBASE
< IBASE
< IBASE
< IBASE
NOM
NOM
NOM
NOM
NOM
DDVI[3:0]:DSTG[7:0]
Table 7-1. Correction Sizes from DLF to DCO
The digital loop filter (DLF) uses the outputs of the frequency comparator
to adjust the internal clock (ICLK) clock period. The DLF generates the
DCO divider control bits (DDIV[3:0]) and the DCO stage control bits
(DSTG[7:0]), which are fed to the DCO. The DLF first concatenates the
DDIV and DSTG registers (DDIV[3:0]:DSTG[7:0]) and then adds or
subtracts a value dependent on the relative error in the low-frequency
base clock’s period, as shown in
conditions, such as operating at a V
the DLF may attempt to use a value above the maximum ($9FF) or
below the minimum ($000). In both cases, the value for DDIV will be
between $A and $F. In this range, the DDIV value will be interpreted the
same as $9 (the slowest condition). Recovering from this condition
requires subtracting (increasing frequency) in the normal fashion until
the value is again below $9FF. (If the desired value is $9xx, the value
may settle at $Axx through $Fxx. This is an acceptable operating
condition.) If the error is less than 5 percent, the internal clock
generator’s filter stable indicator (FICGS) is set, indicating relative
frequency accuracy to the clock monitor.
–32 (–$020)
+32 (+$020)
Correction
–8 (–$008)
–1 (–$001)
+1 (+$001)
+8 (+$008)
Internal Clock Generator Module (ICG)
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
Maximum
Maximum
Maximum
Maximum
Maximum
Maximum
Minimum
Minimum
Minimum
Minimum
Minimum
Minimum
DDIV[3:0]:DSTG[7:0]
Current to New
$xFF to $xDF
$xFF to $xFE
$xFE to $xFF
$xDF to $xFF
$xFF to $xF7
$xF7 to $xFF
$x20 to $x00
$x08 to $x00
$x01 to $x00
$x00 to $x01
$x00 to $x08
$x00 to $x20
Table
DD
level which is out of specification,
(1)
7-1. In some extreme error
–0.0625/17.0625
+0.0625/30.9375
–0.0625/31
+0.0625/17
–0.5/17.5
+0.5/30.5
Relative Correction
+0.5/17
–0.5/31
–2/31
+2/29
+2/17
–2/19
in DCO
MOTOROLA
–0.202%
–0.366%
+0.202%
+0.368%
–6.45%
–10.5%
–1.61%
–2.86%
+1.64%
+2.94%
+6.90%
+11.8%

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