MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 155
MC68HC908KX2
Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908KX2.pdf
(311 pages)
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10.4.1 Port B Data Register
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
Function:
Alternate
Address:
The port B data register (PTB) contains a data latch for each of the eight
port B pins.
PTB7–PTB0 — Port B Data Bits
OSC2 and OSC1 — OSC2 and OSC1 Bits
RxD — SCI Receive Data Input Bit
Reset:
Read:
Write:
These read/write bits are software-programmable. Data direction of
each port B pin is under the control of the corresponding bit in data
direction register B. Reset has no effect on port B data.
Under software control, PTB7 and PTB6 can be configured as
external clock inputs and outputs. PTB7 will become an output clock,
OSC2, if selected in the configuration registers and enabled in the
ICG registers. PTB6 will become an external input clock source,
OSC1, if selected in the configuration registers and enabled in the
ICG registers. See
(ICG)
The PTB1/RxD pin is the receive data input for the SCI module.
When the enable SCI bit, ENSCI, is clear, the SCI module is disabled,
and the PTB1/RxD pin is available for general-purpose I/O. See
Section 14. Serial Communications Interface Module
$0001
OSC2
PTB7
Bit 7
and
Section 9. Configuration Register
Figure 10-6. Port B Data Register (PTB)
Input/Output (I/O) Ports
OSC1
PTB6
6
Section 7. Internal Clock Generator Module
PTB5
TxD
5
Unaffected by reset
PTB4
RxD
4
PTB3
AD3
3
PTB2
AD2
(CONFIG).
2
Input/Output (I/O) Ports
PTB1
AD1
1
Technical Data
(SCI).
PTB0
Bit 0
AD0
Port B
155
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