MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 41
MC68HC908KX2
Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908KX2.pdf
(311 pages)
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MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
1. LVI5OR3 is only writable after a power-on reset (POR). Bit 6 of CONFIG1 is read-only and will read 0.
Addr.
$001A
$001B
$001C
$001D
$001E
$0017
$0018
$0019
$001F
All other bits in CONFIG1 and CONFIG2 are one-time writable after any reset.
Keyboard Interrupt Enable
Configuration Register 2
Configuration Register 1
(CONFIG1)
Control Register (KBSCR)
SCI Baud Rate Register
IRQ Status and Control
Register Name
SCI Status Register 2
Keyboard Status and
SCI Data Register
Timebase Control
Register (KBIER)
Register (TBCR)
Register (ISCR)
See page 210.
See page 211.
See page 211.
See page 177.
See page 178.
See page 220.
See page 169.
See page 144.
See page 144.
Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 7)
(CONFIG2)
(SCDR)
(SCBR)
(SCS2)
Other Resets:
POR Reset:
(1)
(1)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
COPRS
Bit 7
TBIF
R7
T7
R
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
LVISTOP LVIRSTD LVIPWRD LVI5OR3
= Unimplemented
TBR2
R6
T6
6
0
0
0
0
0
0
0
0
0
R
0
0
0
0
0
0
Memory Map
XTALEN
SCP1
TBR1
EXT-
R5
T5
5
R
0
0
0
0
0
0
0
0
0
0
0
0
0
Unaffected by reset
SLOW
KBIE4
SCP0
TBR0
EXT-
R4
T4
4
R
R
0
0
0
0
0
0
0
0
0
0
0
0
= Reserved
CLKEN
IRQF1
KBIE3
KEYF
TACK
EXT-
R3
T3
3
R
R
U
0
0
0
0
0
0
0
0
0
0
SSREC
KBIE2
SCR2
ACKK
ACK1
TBIE
R2
T2
2
0
0
0
0
0
0
0
0
0
0
0
0
0
U = Unaffected
IMASKK
IMASK1
OSCE-
KBIE1
SCR1
TBON
STOP
STOP
NIN-
BKF
R1
T1
1
0
0
0
0
0
0
0
0
0
Technical Data
Memory Map
I/O Registers
MODEK
MODE1
SCIBD-
COPD
SCR0
KBIE0
Bit 0
RPF
SRC
R0
T0
R
0
0
0
0
0
0
0
0
0
41
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