MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 217

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MC68HC908KX2

Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
15.5 Interrupts
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
FROM ICG MODULE
2
2
2
The timebase module can periodically interrupt the CPU with a rate
defined by the selected TBMCLK and the select bits TBR2–TBR0. When
the timebase counter chain rolls over, the TBIF flag is set. If the TBIE bit
is set, enabling the timebase interrupt, the counter chain overflow will
generate a CPU interrupt request.
Interrupts must be acknowledged by writing a logic 1 to the TACK bit.
Figure 15-1. Timebase Block Diagram
2
2
2
Timebase Module (TBM)
2
2
2
2
2
2
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
TBON
Timebase Module (TBM)
R
Technical Data
TBIF
TBMINT
Interrupts
TBIE
217

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