MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 236
MC68HC908KX2
Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908KX2.pdf
(311 pages)
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Timer Interface Module (TIM)
Technical Data
236
NOTE:
NOTE:
TSTOP — TIM Stop Bit
Do not set the TSTOP bit before entering wait mode if the TIM is required
to exit wait mode.
TRST — TIM Reset Bit
Setting the TSTOP and TRST bits simultaneously stops the TIM counter
at a value of $0000.
PS2–PS0 — Prescaler Select Bits
This read/write bit stops the TIM counter. Counting resumes when
TSTOP is cleared. Reset sets the TSTOP bit, stopping the TIM
counter until software clears the TSTOP bit.
Setting this write-only bit resets the TIM counter and the TIM
prescaler. Setting TRST has no effect on any other registers.
Counting resumes from $0000. TRST is cleared automatically after
the TIM counter is reset and always reads as logic 0. Reset clears the
TRST bit.
These read/write bits select one of the seven prescaler outputs as the
input to the TIM counter as
PS2–PS0 bits.
1 = TIM counter stopped
0 = TIM counter active
1 = Prescaler and TIM counter cleared
0 = No effect
Timer Interface Module (TIM)
PS2–PS0
000
001
010
100
101
011
110
111
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
Table 16-1. Prescaler Selection
Table 16-1
Internal bus clock
Internal bus clock
Internal bus clock
Internal bus clock
Internal bus clock
Internal bus clock
Internal bus clock 1
TIM Clock Source
Not available
shows. Reset clears the
16
32
64
2
8
4
MOTOROLA
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