MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 153
MC68HC908KX2
Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908KX2.pdf
(311 pages)
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MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
1. I/O pin pulled up to V
2. Writing affects data register, but does not affect input.
PTAPUE
X = Don’t care
Hi-Z = High impedance
Bit
X
1
0
DDRA
Bit
0
0
1
DD
by internal pulllup device
PTA
Bit
When bit DDRAx is a logic 1, reading address $0000 reads the PTAx
data latch. When bit DDRAx is a logic 0, reading address $0000 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
the operation of the port A pins.
X
X
X
Table 10-1. Port A Pin Functions
Input, V
READ DDRA ($0004)
WRITE DDRA ($0004)
WRITE PTA ($0000)
READ PTA ($0000)
Input, Hi-Z
PTAPUEx
I/O Pin
Output
Mode
DD
Input/Output (I/O) Ports
(1)
Figure 10-4. Port A I/O Circuit
RESET
DDRA4–DDRA0
DDRA4–DDRA0
DDRA4–DDRA0
V
Read/Write
INTERNAL
PULLUP
DEVICE
DD
Accesses
to DDRA
DDRAx
PTAx
PTA4–PTA0
Read
Pin
Pin
Table 10-1
Accesses to PTA
Input/Output (I/O) Ports
PTA4–PTA0
PTA4–PTA0
PTA4–PTA0
summarizes
Technical Data
Write
Port A
(2)
(3)
PTAx
153
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