MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 169

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MC68HC908KX2

Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
Address:
IRQF1 — IRQ1 Flag Bit
ACK1 — IRQ1 Interrupt Request Acknowledge Bit
IMASK1 — IRQ1 Interrupt Mask Bit
MODE1 — IRQ1 Edge/Level Select Bit
Reset:
Read:
Write:
This read-only status bit is high when the IRQ1 interrupt is pending.
Writing a logic 1 to this write-only bit clears the IRQ1 latch. ACK1
always reads as logic 0. Reset clears ACK1.
Writing a logic 1 to this read/write bit disables IRQ1 interrupt requests.
Reset clears IMASK1.
This read/write bit controls the triggering sensitivity of the IRQ1 pin.
Reset clears MODE1.
1 = IRQ1 interrupt pending
0 = IRQ1 interrupt not pending
1 = IRQ1 interrupt requests disabled
0 = IRQ1 interrupt requests enabled
1 = IRQ1 interrupt requests on falling edges and low levels
0 = IRQ1 interrupt requests on falling edges only
Figure 12-2. IRQ Status and Control Register (ISCR)
$001D
Bit 7
R
R
0
0
External Interrupt (IRQ)
= Reserved
6
0
R
0
R
5
0
0
U = Unaffected
R
4
0
0
IRQF1
R
U
3
IRQ Status and Control Register
ACK1
2
0
0
External Interrupt (IRQ)
IMASK1
1
0
Technical Data
MODE1
Bit 0
0
169

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