MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 257

• Manufacturer Part Number: MC68HC908KX2
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

18.5.1 Normal Monitor Mode
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
NOTE:
mode pins are configured appropriately. A second method, intended for
in-circuit programming applications, will force entry into monitor mode
without requiring high voltage on the IRQ1 pin when the reset vector
locations of the FLASH are erased ($FF).
Both of these methods require that the PTA1 pin be pulled low for the
first 24 CGMXCLK cycles after the part comes out of reset. This check
is used by the monitor code to configure the MCU for serial
communication.
Normal monitor mode is useful for MCU evaluation, factory testing, and
development tool programming operation.
example circuit used for normal monitor mode.
conditions for entering this mode.
PTA1 = 0 and PTA0 = 1 allow normal serial communications. PTA1 = 1
allows parallel communications during security code entry. (For parallel
communications, configure PTA0 = 0 or PTA0 = 1.)
The MCU initially comes out of reset using the external clock for its clock
source. This overrides the user mode operation of the oscillator circuits
where the part comes up using the internally generated oscillator.
Running from an external clock allows the MCU, using an appropriate
frequency clock source, to communicate with host software at standard
baud rates.
$FFFE/
$FFFF
blank
$FF
X
IRQ1
V
Pin
V
TST
DD
(PTXMOD1)
Monitor ROM (MON)
PTB1 Pin
X
Table 18-1. Monitor Mode Entry
0
(PTXMOD0)
PTB0 Pin
X
1
PTA1
Pin
0
0
Figure 18-1
PTA0
Pin
Table 18-1
1
1
CGMXCLK
---------------------------- -
CGMXCLK
---------------------------- -
CGMOUT
Monitor ROM (MON)
2
2
Monitor Mode Entry
shows an
shows the pin
Technical Data
Frequency
CGMOUT
------------------------- -
CGMOUT
------------------------- -
Bus
(f
2
2
OP
)
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