MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 21
MC68HC908KX2
Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908KX2.pdf
(311 pages)
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Technical Data — MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
Figure
1-1
1-2
1-3
2-1
2-2
4-1
4-2
4-3
4-4
5-1
5-2
5-3
5-4
5-5
5-6
6-1
6-2
6-3
6-4
6-5
6-6
6-7
6-8
6-9
6-10 Interrupt Recognition Example . . . . . . . . . . . . . . . . . . . . . . . . . 90
MC68HC908KX8 MCU Block Diagram. . . . . . . . . . . . . . . . . . . 32
PDIP and SOIC Pin Assignments. . . . . . . . . . . . . . . . . . . . . . . 33
Power Supply Bypassing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Control, Status, and Data Registers . . . . . . . . . . . . . . . . . . . . . 39
FLASH Control Register (FLCR) . . . . . . . . . . . . . . . . . . . . . . . 50
FLASH Programming Flowchart . . . . . . . . . . . . . . . . . . . . . . . .56
FLASH Block Protect Register (FLBPR). . . . . . . . . . . . . . . . . . 57
FLASH Block Protect Start Address . . . . . . . . . . . . . . . . . . . . . 57
CPU Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Accumulator (A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Index Register (H:X) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Stack Pointer (SP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Program Counter (PC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Condition Code Register (CCR) . . . . . . . . . . . . . . . . . . . . . . . .64
SIM Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79
SIM I/O Register Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
System Clock Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Sources of Internal Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . .83
Internal Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
POR Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Interrupt Entry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .88
Interrupt Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Interrupt Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .89
List of Figures
Title
List of Figures
Technical Data
Page
21
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